专利名称:METHOD FOR MANUFACTURING WIRING
SUBSTRATE
发明人:YAMAMOTO, Hisamitsu,KAWASE,
Tomohiro,TAKEUCHI, Masaharu
申请号:EP15842761.7申请日:20150914公开号:EP3196339B1公开日:20190828
摘要:Disclosed herein is a method for fabricating a wiring board in which a targetsubstrate having via holes and/or trenches is subjected to an electroless plating processwhile being immersed in an electroless plating solution to fill the via holes and/or thetrenches with a plating metal. The method includes the steps of: supplying the
electroless plating solution to under the target substrate; diffusing an oxygen-containinggas into the electroless plating solution supplied under the target substrate; andallowing the electroless plating solution to overflow from over the target substrate.
代理机构:Delorme, Nicolas
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