专利名称:Apparatus and method of dynamic and
deterministic changes in clock frequency forlower power consumption while maintainingfast interrupt handling
发明人:Nicholas J. Kelsey,Kinyue Szeto,Ravi Sharma申请号:US09730977申请日:20001205公开号:US06684342B1公开日:20040127
专利附图:
摘要:An apparatus and method to provide a data processing system with reduced
average power consumption while maintaining fast interrupt handling, and/or selectivelychange clock frequency for accessing memory with various access speeds. In a firstembodiment, the invention provides a method to deterministically change a clockfrequency between a first clock frequency and a second clock frequency in a dataprocessing system to process operations upon the occurrence of a condition. In a secondembodiment, the invention provides a method to change the clock frequency of a dataprocessing system to process operations upon the occurrence of a condition. In a thirdembodiment, the invention provides a clock divider circuit to produce a core clock signal.In a fourth embodiment, the invention provides a data processing system with adeterministically variable processor clock.
申请人:UBICOM, INC.
代理机构:Fenwick & West LLP
更多信息请下载全文后查看
因篇幅问题不能全部显示,请点此查看更多更全内容